diff -ru sys/dev/ic/wi.c sys_imaq/dev/ic/wi.c --- sys/dev/ic/wi.c Sun Sep 23 02:22:25 2001 +++ sys_imaq/dev/ic/wi.c Thu Oct 11 15:09:20 2001 @@ -1891,8 +1891,12 @@ printf("RF:PRISM2.5 MAC:ISL3873"); sc->sc_prism2 = 1; break; + case WI_NIC_PRISM2_5_3874A: + printf("RF:PRISM2.5 MAC:ISL3873 ISL3874A(PCI)"); + sc->sc_prism2 = 1; + break; default: - printf("Lucent chip or unknown chip\n"); + printf("Lucent chip or unknown chip 0x%x\n", le16toh(ver.wi_ver[0])); sc->sc_prism2 = 0; break; } diff -ru sys/dev/ic/wireg.h sys_imaq/dev/ic/wireg.h --- sys/dev/ic/wireg.h Sun Sep 23 02:22:25 2001 +++ sys_imaq/dev/ic/wireg.h Thu Oct 11 14:49:23 2001 @@ -96,18 +96,18 @@ * register space access macros */ #define CSR_WRITE_4(sc, reg, val) \ - bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val) + bus_space_write_4(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg) , val) #define CSR_WRITE_2(sc, reg, val) \ - bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val) + bus_space_write_2(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg), val) #define CSR_WRITE_1(sc, reg, val) \ - bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val) + bus_space_write_1(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg), val) #define CSR_READ_4(sc, reg) \ - bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg) + bus_space_read_4(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg)) #define CSR_READ_2(sc, reg) \ - bus_space_read_2(sc->sc_iot, sc->sc_ioh, reg) + bus_space_read_2(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg)) #define CSR_READ_1(sc, reg) \ - bus_space_read_1(sc->sc_iot, sc->sc_ioh, reg) + bus_space_read_1(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg)) #ifndef __BUS_SPACE_HAS_STREAM_METHODS #define bus_space_write_stream_2 bus_space_write_2 @@ -117,13 +117,13 @@ #endif #define CSR_WRITE_STREAM_2(sc, reg, val) \ - bus_space_write_stream_2(sc->sc_iot, sc->sc_ioh, reg, val) + bus_space_write_stream_2(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg), val) #define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \ - bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh, reg, val, count) + bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg), val, count) #define CSR_READ_STREAM_2(sc, reg) \ - bus_space_read_stream_2(sc->sc_iot, sc->sc_ioh, reg) + bus_space_read_stream_2(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg)) #define CSR_READ_MULTI_STREAM_2(sc, reg, buf, count) \ - bus_space_read_multi_stream_2(sc->sc_iot, sc->sc_ioh, reg, buf, count) + bus_space_read_multi_stream_2(sc->sc_iot, sc->sc_ioh, (sc->sc_pci? reg * 2: reg), buf, count) /* * The WaveLAN/IEEE cards contain an 802.11 MAC controller which Lucent @@ -381,6 +381,7 @@ #define WI_NIC_HWB1153 0x8007 #define WI_NIC_P2_SST 0x8008 /* Prism2 with SST flush */ #define WI_NIC_PRISM2_5 0x800C +#define WI_NIC_PRISM2_5_3874A 0x8013 }; /* @@ -626,3 +627,6 @@ #define WI_SNAP_WORD0 (WI_SNAP_K1 | (WI_SNAP_K1 << 8)) #define WI_SNAP_WORD1 (WI_SNAP_K2 | (WI_SNAP_CONTROL << 8)) #define WI_SNAPHDR_LEN 0x6 + +#define WI_PCICOR (0x4c / 2) +#define WI_PCIHCR (0x5c / 2) diff -ru sys/dev/ic/wivar.h sys_imaq/dev/ic/wivar.h --- sys/dev/ic/wivar.h Sun Sep 23 02:22:25 2001 +++ sys_imaq/dev/ic/wivar.h Wed Oct 10 22:11:55 2001 @@ -50,6 +50,7 @@ int sc_enabled; int sc_prism2; int sc_prism2_ver; + int sc_pci; bus_space_tag_t sc_iot; /* bus cookie */ bus_space_handle_t sc_ioh; /* bus i/o handle */ diff -ru sys/dev/pcmcia/if_wi_pcmcia.c sys_imaq/dev/pcmcia/if_wi_pcmcia.c --- sys/dev/pcmcia/if_wi_pcmcia.c Mon Sep 17 18:21:58 2001 +++ sys_imaq/dev/pcmcia/if_wi_pcmcia.c Wed Oct 10 22:13:16 2001 @@ -365,6 +365,7 @@ } sc->sc_ifp = &sc->sc_ethercom.ec_if; + sc->sc_pci = 0; /* this is not PCI */ if (wi_attach(sc) != 0) { printf("%s: failed to attach controller\n", sc->sc_dev.dv_xname); --- sys/dev/pci/files.pci Sun Sep 16 09:11:42 2001 +++ sys_imaq/dev/pci/files.pci Wed Oct 10 07:09:18 2001 @@ -458,3 +458,7 @@ file dev/pci/isic_pci_elsa_qs1p.c isic_pci file dev/pci/isic_pci_avm_fritz_pci.c isic_pci +# Intersil Wireless Lan +attach wi at pci with wi_pci +file dev/pci/if_wi_pci.c wi_pci +